Matt Shaw shares an insight into his role as an Intel researcher in residence.

Matt Shaw

How long have you worked at Intel?

I have been working at Intel for 28 years, starting in 1993 in the Fab 10 Yield team as a defect reduction engineer. I then worked as a process engineer in Fab 14 on CVD of dielectrics. I then moved over to the semiconductor research area in 2004, working mainly on nanopatterning, thin film deposition and magnetic device research.

What university do you primarily work with?

I work with three universities. It's busy! I primarily work with Trinity College Dublin at the Advanced Materials and BioEngineering Research (AMBER) centre and Dublin City University at the Department of Physics. I am also involved with the Tyndall National Institute (part of UCC) in Cork.

Can you tell us about what is involved in being a researcher in residence?

It involves a mixture of lab, Fab, meeting researchers and office activity. My key role is to undertake research at the university on an Intel relevant and sponsored project along with teams of academic researchers. I then report back to the company on the results. The research I do is potentially of use in the fabrication of Intel products five to 10 years down the line. I am carrying out pathfinding research for my employer.

What are some of your key responsibilities?

My main responsibilities involve:

  • Undertaking scientific research (lab processing, wet bench chemistry, wet/dry etching, thin film dep, patterning etc) and metrology (SEM, TEM, AFM, XRR, WCA etc.) within TCD, DCU and Tyndall and reporting results back to stakeholders within Intel in the likes of components research and assembly test technology development groups.
  • Identifying new research opportunities and capabilities within the Irish research ecosystem which are new and novel and align to Intel’s technology roadmap in materials, process, metrology and devices. I present and discuss these new ideas with Intel research stakeholders in Portland, Oregon, to see if a collaboration and Intel funded project makes sense.
  • Reading scientific papers and journals and technical reading to upskill myself and validate/understand new ideas. This technical reading helps develop an expertise in the area. I also write scientific papers for publication based on our results.
  • Identifying new technical talent within the universities that may be of interest to Intel in terms of hiring for technician or engineering roles. I also mentor PhD students.

What research project(s) are you currently working on?

I am currently working on three research projects, which are longer-term pathfinding technology research. The projects are materials and metrology based in the areas of thin film deposition, EUV metrology for EUV resist development and magnetic composite materials for on chip inductors.

These projects are directly funded by Intel research groups such as components research in Oregon and assembly test technology development in Arizona.  As you can see, the work is quite varied but are all relevant to Intel’s future technologies in fab and packaging processing.

The projects are carried out in collaboration with academic groups of professors, postdoctorates and PhD students based at TCD, DCU and Tyndall in their labs using their capabilities and equipment.

In your world of work, what are you excited about for the coming years?

I am excited about the transition of lithographic patterning from a top-down process using light and resists to a bottom-up process using block copolymers and a process called self-assembly (or directed self assembly – DSA).

Engineered surface chemistry is used to guide and position these bottom-up patterns. I had worked on this patterning research for a number of years in AMBER and Tyndall and with the EU as part of multipartner industry/academic groups.

I’m happy to say this research has been taken internally to our Intel groups in Portland for further assessment and development, which is continuing. This type of bottom-up patterning has the potential to form features (lines and holes) with spacings less than 5nm without the need for EUV or 193nm lithography.

Being a researcher in residence is technically very challenging but very interesting. You have the opportunity to work with some of the brightest minds in science and engineering. You get to identify, develop and assess new technical ways of fabricating semiconductors and of measuring and characterising materials and structures… Atom by Atom!.