We recently caught up with Roger Nagle, who is a researcher in residence at the Tyndall National Institute in Cork.
I joined Intel in 1997 and worked in the fab until about 2009 at which point I moved to external research, so I’m with Intel now for 24 years.
I have been based at the Tyndall National Institute in Cork since taking up the research role. I have also supported research efforts in University College Cork (UCC) and in other universities such as Dublin City University (DCU) and Trinity College Dublin (TCD).
My role has varied depending on the number of concurrent projects as well as the technologies involved. For some device related research for example, my contribution has been very applied and involved making and testing novel device structures such as group III-V channel transistors using the cleanroom facilities available in Tyndall.
In other cases, such as theory-based research on the predictive modelling of a novel device architecture, or the modelling of ALD deposition processes to determine the mechanism at play for novel copper precursors, then the involvement is more about support and project management.
We always try to learn as much as we can from each activity in order to support the project discussions, help ensure the effort delivers useful results while upskilling ourselves to help us to see the next project opportunity for Intel and to contribute more in that field.
Being able to continue to win Intel funding for these projects requires that we can deliver excellent outcomes from Irish research in the same way as the best local US institutes that compete for this same funding.
And so, a large part of this role is concerned with managing the funded projects so as to meet expectations and thereby generate valuable results and ensure we can successfully compete for future Intel funding.
As we are Intel representatives in external institutes, we also have a role to represent the best of Intel to the academic staff, principal investigators, postdoctoral researchers, and PhD students that we interact with daily.
We help to make sure that Intel is perceived as a good company to collaborate with and to bring the best new research ideas to. As these institutes work with our competitors also, it is important that we are the company of choice for excellent researchers who are seeking collaboration. We also work with many PhD students and so through our interactions we try to encourage many of these to consider future careers at Intel.
Our first responsibility it to ensure our funded projects are delivering to our customer’s expectations. So, if Intel has decided to spend some research budget to investigate a new technique for assembling high-density arrays of optical transducers to meet the expectations of one of our business groups, then we ensure that their funding delivers useful results. This is achieved through managing the resources and expectations and assisting with the work plans and activities where we can.
Another responsibility is to stay informed about the novel research going on within our partner institutes to ensure we can derive future value for Intel. If we see a relevant and potentially impactful piece of research, then we will firstly work to find a customer inside Intel to support the activity.
We then coordinate the process to define a project, win the funding, work through IP questions, and put a legal agreement in place to allow the collaboration to happen. After that the work of delivering useful research begins.
I also look after our PhD funding pipeline, which involves finding and supporting excellent PhD candidates to carry out their research in topics of relevance to Intel.
This allows us to work with and get to know the candidates during their study while they support the research efforts of our preferred principal investigators. This results in hiring opportunities for Intel as well as possible future funded projects as promising research develops.
I am working on three multiyear projects – two photonics projects funded by Intel Labs and Silicon Photonics Product Division (SPPD), and one funded by Components Research (CR).
The two photonics projects are related and are looking at near-term solutions for assembling higher density arrays of high bandwidth emitter/receiver pairs for optical data interconnectors within the data centre. Optical based interconnect solutions are increasingly replacing copper within the data centre to relieve bandwidth constraints and reduce power-per-bit consumption metrics.
In our CR funded project, we are trying to develop a relatively obscure approach to characterising channel-to-gate oxide interface electrical defects. This method, known as Deep Level Transient Spectroscopy (DLTS) is not new but we are learning whether it may be applied to new device channel materials to allow defect characterisation where other methods have failed to provide the necessary insights into electrical defect behaviour.
A lot of my recent research has been in photonics and the trend towards increased use of photonics-based interconnects has now firmly taken hold. While it was a struggle for optical interconnect solutions to gain acceptance in the ICT industry for many years, it is exciting to see that its advantages are understood now and are being exploited.
Further implementation of photonics in areas such as data centre interconnection is now inevitable. Watching that process of gradual acceptance by the industry has been intriguing.
Another exciting aspect of where the research meets technology development is the increasing pace of dispositioning of ideas. When I first started there was still silicon transistor research going on in Tyndall – nearly 50 years after the first silicon device was made.
But in my time, research into novel channel materials has clearly accelerated. We spent many years exploring group III-V channel devices as the 'next big thing' for frontend transistors and the industry considered that for many years.
Now newer material options seem to move from concept to demonstration and then on to decision making much faster than before. The technology challenges and complexities are increasing while, in parallel, the variety of new material and device options is also increasing.
So, our ability to screen these options quickly has needed to keep pace and this is clearly happening. This makes identifying the best new candidate technologies a little less daunting.